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Nr. Titel Autor Jahr
1 3D Wafer Level Packaging By Using Cu-Through Silicon Vias For Thin Mems Accelerometer Packages Hofmann, Lutz et al. 2017
2 Study on TSV isolation liners for a Via Last approach with the use in 3D-WLP for MEMS Hofmann, Lutz* et al. 2016
3 Back-end-of-line compatible contact materials for carbon nanotube based interconnects Fiedler, Holger* et al. 2015
4 Micro Electrical Mechanical System (MEMS), Gap Reduction, laser-micro-welding Meinecke, Christoph Robert et al. 2015
5 Technologieentwicklung einer post-process Elektrodenspaltverringerung zur Herstellung von hochauflösenden Sensorsystemen Meinecke, Christoph Robert et al. 2015
6 Carbon nanotube based via interconnects: Performance estimation based on the resistance of individual carbon nanotubes Fiedler, Holger et al. 2014
7 Localization length of integrated multi-walled carbon nanotubes Fiedler, Holger et al. 2014
8 Low resistance carbon nanotube - metal contact for interconnect applications Fiedler, Holger et al. 2013
9 Distinguishing between Individual Contributions to the Via Resistance in Carbon Nanotubes Based Interconnects Fiedler, Holger* et al. 2012
10 Fabrication and characterisation of CNT via interconnects for application in ULSI circuits Fiedler, Holger et al. 2011
11 Influence of barrier crystallization on CV characteristics of MIS structures Ecke, Ramona et al. 2007
12 Wafer-Level Active Testing of Capacitive Inertial Sensors Nowack, Markus et al. 2007
13 Scaling Down Thickness of ULK Materials for 65nm Node and its Effect on Electrical Performance Frühauf, Swantje* et al. 2005
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